45. TB11–PB11 Parity Test Plan¶

Created: April 11, 2026 Status: Active — G5 PARTIAL (Apr 19, 2026): GUI pipeline complete, 421/350 DXF entities (71 extra); 7/21 feature groups at 100% parity; perimeter_dim over-count is top priority Scope: Every PB11 VLX capability that TB11 must match for functional parity Prerequisite: TB11 Manual Test Procedures Tests 1–26 (menu routing baseline) Evidence Source: reports/vlx-analysis/vlx-forensics-discovery-report.md DFMEA: Extends DFMEA-001 through DFMEA-035; adds DFMEA-036+ for parity-specific risks

Purpose¶

This document defines every test that must pass before TB11 achieves functional parity with the PB11 VLX build. When every test in this plan is marked PASS or DEFERRED (with documented justification), TB11 is PB11-equivalent.

Parity means: For every PB11 menu item, dialog, field, and drawing operation that a user can trigger, TB11 produces identical behavior — same dialog, same fields, same output, same data persistence.

Parity does NOT mean: Identical internal code structure, identical API usage, or identical binary output. The routing mechanism may differ (named constants vs bitmask math) as long as user-visible behavior matches.

Parity Mode Taxonomy¶

Each gate in this plan is governed by one of four parity modes. The mode determines what evidence is required and what constitutes a pass. Do not substitute evidence across modes.

Mode	Name	Evidence Standard	Gates
1 — AutoIT/OCR	Dialog appearance on live XP/AC2000 VMs	OCR text ≥95% character match vs VM 102 golden baseline. Logs are never standalone pass evidence. Pixel diff is diagnostic only.	G2
2 — Headless DXF	Drawing output parity across acad2000, acad2027, and cv-web	DXF entity-by-entity comparison. Deterministic — exact match or documented delta. No percentage threshold.	G5
3 — progcont/CUIX Trace	Every route resolves to a handler + dialog; no orphaned lisps or dlgs	Full trace map: progcont → handler → DCL → dialog key. Presentation differences acceptable; orphaned files are not.	G1, G7
4 — GUI User-Driven	End-to-end workflows verified by a human	AutoCAD command line transcript (F2 copy) + drawing screenshots. `[CSV-ERROR]` in transcript = automatic FAIL.	G3, G4, G6

Full toolchain and evidence packet requirements: reports/VALIDATION-INDEX.md.

Parity Gate Criteria¶

Gate	Requirement	Measured By
G1: Menu Routing	All 17 progcont menu items route to correct handler	Doc 43, Tests 1–26
G2: Dialog Appearance	All 14 shared dialogs load and display correctly	This doc, Phase 2
G3: Field Functionality	All dialog fields accept input, validate, and persist	This doc, Phase 3
G4: Data Persistence	NOD XRecord + ATTRIB round-trip matches PB11	This doc, Phase 4
G5: Drawing Operations	Panel/site geometry creation matches PB11 output	This doc, Phase 5
G6: Print & Output	Print workflow produces correct output	This doc, Phase 6
G7: Infrastructure	Module loading, error handling, startup chain	Doc 43, Test 26

Pass/Fail Scoring¶

PASS: Behavior matches PB11 (OCR comparison ≥95% for dialogs; field-by-field match for data).
PARTIAL: Core behavior matches but cosmetic or non-critical differences exist. Must document the delta.
FAIL: Behavior diverges from PB11 in a user-visible way. Must file bug in doc 32.
BLOCKED: TB11 implementation does not exist (the 10 MISSING features). Not a failure — tracked as reconstruction backlog.
DEFERRED: Deliberately excluded from parity scope (security/licensing, help system). Must justify.

Parity Achieved When¶

G1–G7: Zero FAIL results across all gates.
BLOCKED count: All BLOCKED items documented in the Reconstruction Backlog (Section 10) with priority and effort estimate.
DEFERRED count ≤ 5: No more than 5 tests deferred, each with documented justification.
Bug tracker: All bugs found during parity testing either FIXED or DEFERRED with documented justification.

Test Surface Summary¶

PB11 Feature Inventory (from VLX Forensics)¶

Category	PB11 Count	TB11 Testable	TB11 BLOCKED	TB11 DEFERRED
Progcont menu routes	17	17	0	0
DCL dialogs (shared)	14	14	0	0
DCL dialogs (PB11-only, reimplemented)	6	6	0	0
DCL dialogs (PB11-only, MISSING)	10	0	10	0
Panel editor sub-dialogs	11	11	0	0
Site editor operations	14	8	6	0
VLX-only functions (48)	48	21	23	4
Total	120	77	39	4

Shared Dialog Parity Targets (14 dialogs present in all sources)¶

These are the primary parity targets — they exist in PB11 VLX, v3.60 VLX, v3.60 source, AND TB11 source.

#	Dialog	PB11 Name	TB11 DCL File	Purpose	DCL Similarity
1	`bp_dlg`	Base Plate	`bp_dlg.dcl`	Base plate dimensions & embed specs	High
2	`ch_dlg`	Chamfer	`ch_dlg.dcl`	Panel edge chamfer settings	0.949
3	`dl_dlg`	Detail Lines	`dl_dlg.dcl`	Panel detail line definitions	0.943
4	`dr_dlg`	Door/Recess	`dr_dlg.dcl`	Opening placement (doors, recesses)	High
5	`fs_dlg`	Feature/Shape	`fs_dlg.dcl`	Feature strip or reveal definition	High
6	`invar`	Invariable Data	`invar.dcl`	Blockout/recess invariable data	High
7	`md_dlg`	Panel Options (hub)	`md_dlg.dcl`	Panel operations hub dialog	0.061–0.780 DIVERGED
8	`mp_dlg`	Main Panel	`mp_dlg.dcl`	Master panel dimensions & properties	0.013–0.165 DIVERGED
9	`pl_dlg`	Panel Lines	`pl_dlg.dcl`	Panel line editing	High
10	`pp_dlg`	Panel Properties	`pp_dlg.dcl`	Panel properties summary	High
11	`revision`	Revision	`revision.dcl`	Revision history tracking	High
12	`sd_dlg`	Side Detail	`sd_dlg.dcl`	Side detail definitions	High
13	`slope_dlg`	Slope Calculations	`slope_dlg.dcl`	Slope angle/grade calculator	High
14	`warning`	Warning	`warning.dcl`	Warning/alert display	High

Warning

md_dlg and mp_dlg show MAJOR DIVERGENCE between PB11 and TB11. PB11 uses numeric bitmask button keys (2, 8, 16, 32…). TB11 uses string keys (“new”, “old”, “val”…). These are the highest-risk parity targets and require the most thorough testing.

Reimplemented Dialogs (6 PB11-only dialogs TB11 rebuilt from scratch)¶

#	PB11 Dialog	TB11 Equivalent	Similarity
1	`gl_dlg`	`grid_dlg.dcl`	REIMPLEMENTED
2	`ms_dlg`	`sdwg_dlg.dcl` + `site_dlg.dcl`	REIMPLEMENTED (split)
3	`np_dlg`	`projdet.dcl`	REIMPLEMENTED
4	`pltr`	`plt_dlg.dcl`	REIMPLEMENTED
5	`sl_dlg`	`slab_dlg.dcl`	REIMPLEMENTED
6	`wl_dlg`	`wall_dlg.dcl`	REIMPLEMENTED

Phase 1: Menu Routing (G1) — Doc 43, Tests 1–26¶

Status: Defined. See TB11 Manual Test Procedures.

All 17 progcont menu items are covered by Tests 1–26 in doc 43. This phase verifies that clicking each menu item routes to the correct handler and displays the correct initial dialog.

Progcont–Test Cross-Reference¶

Progcont	Menu Item	Doc 43 Test	Status
1	Edit Current Drawing	Test 4/5/6	🔲
262161	New Drawing	Test 2/3	🔲
262145	Open Drawing	Test 7	🔲
262153	New Project	Test 1	🔲
524289	Edit Project Details	Test 8/9	🔲
262209	View All Layers	Test 10	🔲
262273	View Select Layers	Test 11/12	🔲
262465	Print All Layers (Panel)	Test 13	🔲
262401	Print Layer Presets (Panel)	Test 14	🔲
262657	Print Site Select Layouts	Test 15	🔲
263169	Materials List	Test 16/17	🔲
264193	Revision History	Test 18/19	🔲
262177	Batch Utilities	Test 20	🔲
8193	Slope Calculator	Test 21	🔲
—	Viewport Views (10 items)	Test 22	🔲
—	Shading Modes (3 items)	Test 23	🔲
—	Direct commands (Help, About, etc.)	Test 24–26	🔲

Phase 2: Dialog Appearance (G2) — Tests 27–52¶

Phase 2 verifies that every shared and reimplemented dialog loads, displays, and closes correctly. This is the “does the right dialog appear with the right fields” gate.

Test Reporting Format (Phase 2–6)¶

For each test, record:

Field	What to check
Dialog title bar	Matches expected title
Field count	Number of input fields matches PB11 DCL extracted layout
Button labels	All expected buttons present and labeled correctly
Default values	Fields populated with correct defaults (compare against PB11 runtime globals)
Cancel behavior	Dialog closes cleanly, no state mutation, clean `Command:` return
Command line	No `[CSV-ERROR]`, `[CSV-WARN]`, or `[CV-LOAD ERROR]` messages

Test 27: Main Panel Dialog (mp_dlg) — Field Layout¶

Prerequisite: Panel drawing open with project data. Trigger: Edit Current Drawing on a panel → mp_dlg appears. PB11 Reference: reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/mp_dlg.dcl

Steps¶

Open a panel drawing with project data.
Click ConstructiVision > Edit Current Drawing.
mp_dlg dialog appears.

Verify¶

Check	Expected (from PB11 DCL extraction)
Dialog title	“Main Panel” or equivalent
Panel name field	Present, editable
Width field	Present, editable, numeric
Height field	Present, editable, numeric
Thickness field	Present, editable, numeric
PSI (concrete strength)	Present, editable
PCF (concrete weight)	Present, editable
Accept button	Present, functional
Cancel button	Present, functional
Next/Sub-dialog buttons	Buttons to access sub-dialogs (ch_dlg, dl_dlg, etc.)

Pass Criteria¶

Dialog loads without error.
All fields listed above are present and editable.
Cancel returns to Command: with no state change.

Note

DIVERGENCE ALERT: PB11 mp_dlg uses numeric bitmask keys. TB11 mp_dlg uses string keys. Field NAMES may differ even if the FIELDS are equivalent. Compare field function, not key names.

Test 28: Panel Lines Dialog (pl_dlg)¶

Prerequisite: mp_dlg or panel editor is active. Trigger: Panel Lines button from mp_dlg (or direct routing via panel editor). PB11 Reference: reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/pl_dlg.dcl

Steps¶

From mp_dlg, click the Panel Lines button.
pl_dlg dialog appears.

Verify¶

Check	Expected
Dialog title	“Panel Lines” or equivalent
Line type selections	Present (left edge, right edge, top, bottom, recess)
Dimension fields	Present, editable, numeric
Accept button	Saves line definitions
Cancel button	Clean return to mp_dlg

Pass Criteria¶

Dialog loads. All line-type selections present. Cancel returns to parent dialog.

Test 29: Chamfer Dialog (ch_dlg)¶

Prerequisite: mp_dlg or panel editor is active. Trigger: Chamfer button from mp_dlg. PB11 Reference: reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/ch_dlg.dcl DCL Similarity: 0.949 (near-identical to v3.60/TB11)

Steps¶

From mp_dlg, click the Chamfer button.
ch_dlg dialog appears.

Verify¶

Check	Expected
Dialog title	“Chamfer” or equivalent
Edge selections	Left, Right, Top, Bottom — each with chamfer on/off
Chamfer dimension fields	Width, depth — numeric
Preview or indicator	Visual chamfer indicator if present
Accept button	Saves chamfer settings
Cancel button	Clean return to mp_dlg

Pass Criteria¶

Dialog loads. Edge selections and dimension fields present. Values persist after Accept.

Test 30: Door/Recess Dialog (dr_dlg)¶

Prerequisite: Panel editor active. Trigger: Door/Recess button from mp_dlg. PB11 Reference: reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/dr_dlg.dcl

Steps¶

From mp_dlg, click the Door/Recess button.
dr_dlg dialog appears.

Verify¶

Check	Expected
Dialog title	“Door and Recess Details” or equivalent
Opening type	Door, window, recess selections
Dimension fields	Width, height, sill height, jamb offsets
Position fields	Horizontal offset from panel edge
Quantity/count	Number of openings
Accept button	Saves opening definitions
Cancel button	Clean return

Pass Criteria¶

Dialog loads. Opening types selectable. Dimensions editable. Cancel returns cleanly.

Test 31: Detail Lines Dialog (dl_dlg)¶

Prerequisite: Panel editor active. Trigger: Detail Lines button from mp_dlg. PB11 Reference: reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/dl_dlg.dcl DCL Similarity: 0.943

Steps¶

From mp_dlg, click the Detail Lines button.
dl_dlg dialog appears.

Verify¶

Check	Expected
Dialog title	“Detail Lines” or equivalent
Line type selections	Available detail line types
Position/offset fields	Numeric, editable
Accept/Cancel buttons	Present, functional

Pass Criteria¶

Dialog loads. Fields present and editable. Clean return on cancel.

Test 32: Feature/Shape Dialog (fs_dlg)¶

Prerequisite: Panel editor active. Trigger: Feature Strip button from mp_dlg. PB11 Reference: reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/fs_dlg.dcl

Steps¶

From mp_dlg, click the Feature Strip button.
fs_dlg dialog appears.

Verify¶

Check	Expected
Dialog title	“Feature Strip” or equivalent
Feature type selections	Reveal, rustication, etc.
Dimension fields	Width, depth, spacing
Position fields	Vertical/horizontal placement
Accept/Cancel buttons	Present, functional

Pass Criteria¶

Dialog loads. Feature type selectable. Dimensions editable.

Test 33: Side Detail Dialog (sd_dlg)¶

Prerequisite: Panel editor active. Trigger: Side Detail button from mp_dlg. PB11 Reference: reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/sd_dlg.dcl

Steps¶

From mp_dlg, click the Side Detail button.
sd_dlg dialog appears.

Verify¶

Check	Expected
Dialog title	“Side Detail” or equivalent
Side selections	Left, Right, Top, Bottom
Detail type	Detail definitions per side
Accept/Cancel buttons	Present, functional

Pass Criteria¶

Dialog loads. Side selections functional.

Test 34: Base Plate Dialog (bp_dlg)¶

Prerequisite: Panel editor active. Trigger: Base Plate button from mp_dlg. PB11 Reference: reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/bp_dlg.dcl

Steps¶

From mp_dlg, click the Base Plate button.
bp_dlg dialog appears.

Verify¶

Check	Expected
Dialog title	“Base Plate” or equivalent
Plate dimension fields	Width, length, thickness
Embed/anchor fields	Bolt pattern, embed type
Position fields	Placement on panel
Accept/Cancel buttons	Present, functional

Pass Criteria¶

Dialog loads. Dimensions and embed specs editable.

Test 35: Weld Connections Dialog (wc_dlg)¶

Prerequisite: Panel editor active. Trigger: Weld Connections button from mp_dlg. PB11 Reference: reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/wc_dlg.dcl

Warning

HIGH DIVERGENCE: PB11 wc_dlg vs TB11 wc_dlg.dcl similarity = 0.008. These are virtually unrelated dialogs. Field-by-field comparison is mandatory.

Steps¶

From mp_dlg, click the Weld Connections button.
wc_dlg dialog appears.

Verify¶

Check	Expected (PB11 behavior)
Dialog title	Weld connection configuration
Connection type fields	Weld type, size, location
Hardware selection	Embed plate, angle, channel selectors
Position fields	Placement on panel edges
Accept/Cancel buttons	Present, functional

Pass Criteria¶

Dialog loads. Connection type selectable. Hardware fields editable.
Document ALL divergences from PB11 — this dialog is known to be significantly different.

Test 36: Panel Properties Dialog (pp_dlg)¶

Prerequisite: Panel editor active. Trigger: Panel Properties button from mp_dlg. PB11 Reference: reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/pp_dlg.dcl

Steps¶

From mp_dlg, click the Panel Properties button.
pp_dlg dialog appears.

Verify¶

Check	Expected
Dialog title	“Panel Properties” or equivalent
Property summary	Read-only display of current panel values
Concrete specs	PSI, PCF, cover values displayed
Panel dimensions	Width, height, thickness displayed
Close/OK button	Returns cleanly

Pass Criteria¶

Dialog loads. Property values match what was entered in mp_dlg.

Test 37: Invariable Data Dialog (invar)¶

Prerequisite: Panel editor active. Trigger: Blockout or invariable data button from panel editor flow.

Steps¶

Navigate to the blockout/invariable data function.
invar dialog appears.

Verify¶

Check	Expected
Dialog loads	Yes
Blockout definition fields	Size, position, type
Accept/Cancel	Functional

Pass Criteria¶

Dialog loads and fields are editable.

Test 38: Slope Calculator Dialog (slope_dlg) — Field Detail¶

Prerequisite: Any drawing open. Trigger: ConstructiVision > Slope Calculator (already covered in doc 43 Test 21 for appearance).

This test extends Test 21 with field-level verification.

Verify¶

Check	Expected
Input fields	Rise, run, angle, grade — at least 2 of 4
Calculation behavior	Entering any 2 values calculates the others
Output precision	Matches PB11 precision (verify against known values)

Known Test Values¶

Rise	Run	Expected Angle	Expected Grade
12	12	45.0°	100%
6	12	26.57°	50%
1	48	1.19°	2.08%

Pass Criteria¶

Calculated values match expected within ±0.01° for angle, ±0.01% for grade.

Test 39: Revision Dialog (revision) — Field Detail¶

Prerequisite: Panel drawing with UPDATE block. Trigger: ConstructiVision > Revision History (extends doc 43 Test 18).

Verify¶

Check	Expected
Revision number field	Displays current rev from UPDATE block `REV` attribute
Revision date field	Displays date from UPDATE block `REVDATE` attribute
Revision description	Editable text field for change description
Add new revision	Button/mechanism to increment rev number
Accept/Cancel	Functional — Accept writes to UPDATE block

Pass Criteria¶

Rev data displays correctly from block attributes.
New revision persists to UPDATE block after Accept.

Test 40: Warning Dialog (warning) — Behavior¶

Trigger: Any error condition that raises a warning (e.g., no project loaded, invalid input).

Verify¶

Check	Expected
Dialog loads	Yes, with correct message text
OK/Close button	Dismisses dialog, clean return
No stale state	Warning dismissal does not corrupt routing state

Pass Criteria¶

Warning displays with contextually correct message. Clean dismissal.

Test 41: Panel Options Hub (md_dlg) — Button Routing¶

Prerequisite: Panel drawing open, project loaded. Trigger: Edit Current Drawing on panel (progcont 1).

Warning

CRITICAL DIVERGENCE: PB11 md_dlg uses numeric bitmask button keys that set progcont for sub-dialog routing. TB11 md_dlg uses string keys with a parallel routing system. This test verifies that every button in the TB11 hub routes to the same destination as PB11, regardless of the internal mechanism.

PB11 md_dlg Button Map (from extracted DCL + runtime analysis)¶

PB11 Button Key	PB11 Label	Expected Destination	DCL_* ID
2	Slope Calculations	`slope_dlg`	DCL_MD=2
4	Panel Drawing Options (sub)	`mp_dlg`	DCL_MP=3
8	Edit Project	`np_dlg` / `projdet`	DCL_NP=20
16	New Drawing	File picker → new `.dwg`	—
32	Edit Drawing	File picker → open `.dwg`	—
64	Batch Utilities	`bu_dlg` / `btch_dlg`	DCL_BU=21
128	View All Layers	Layer on command	—
256	Print Setup	`pltr` / `plt_dlg`	—
512	View Select Layers	`plyr_dlg` / `lyr_dlg`	—
1024	Print Select Layers	`play` / print config	—
2048	Materials List	`matl_dlg`	—
4096	Revision History	`revision`	—

Steps¶

Open a panel drawing → Edit Current Drawing.
md_dlg appears.
Click each button and verify it routes to the correct destination.
For each button: note the destination dialog title, then Cancel back to md_dlg.
Test the Close/Cancel button on md_dlg itself.

Pass Criteria¶

Every button routes to the correct destination dialog or action.
Returning from each sub-dialog re-displays md_dlg correctly.
Close/Cancel exits cleanly.

Test 42: Site Drawing Options (ms_dlg / sdwg_dlg + site_dlg)¶

Prerequisite: Site drawing open, project loaded. Trigger: Edit Current Drawing on site (progcont 1 → site detection).

Note

PB11 uses a single ms_dlg with bitmask+mst1 routing. TB11 splits this into sdwg_dlg (site drawing type) + site_dlg (site operations). Both approaches should route to the same destinations.

PB11 ms_dlg Button Map (from VLX forensics)¶

PB11 mst1 Key	Label	Expected Destination	TB11 Equivalent
1	Grid Lines	`gl_dlg`	`grid_dlg.dcl` ✓
2	Wall Lines	`wl_dlg`	`wall_dlg.dcl` ✓
4	Slab Lines	`sl_dlg`	`slab_dlg.dcl` ✓
8	Footing Connection	`ftconn`	STUB (shows “not available”)
16	Print Site Layouts	print flow	via `site_dlg → savelay`
32	Create/Modify Viewports	viewport config	UNKNOWN — verify
64	Attach Panels	panel insertion	`inspanel` ✓ via `site_dlg`
128	Detach Panels	panel removal	UNKNOWN — verify
256	Tilt-up Panels	tiltup animation	`tiltup.dcl` ✓ via `site_dlg`
512	Construction Layout	layout config	UNKNOWN — verify
1024	Print Materials List	`matl_dlg`	`matl_dlg` ✓ via `site_dlg`
4096	2nd Floor Joist/Girder	`sc_dlg`	BLOCKED — MISSING
8192	3rd Floor Joist/Girder	`tc_dlg`	BLOCKED — MISSING
16384	Roof Joist/Girder	`rc_dlg`	BLOCKED — MISSING

Steps¶

Open a site drawing → Edit Current Drawing.
Site hub dialog appears.
For each TESTABLE operation (1, 2, 4, 8, 16, 64, 256, 1024): click the button, verify destination, Cancel back.
For UNKNOWN operations (32, 128, 512): attempt and document what happens.
For BLOCKED operations (4096, 8192, 16384): verify they are either absent or show “not implemented” message.

Pass Criteria¶

Grid Lines → grid_dlg loads. Wall Lines → wall_dlg loads. Slab Lines → slab_dlg loads.
Footing Connection → shows “not available” stub (acceptable PARTIAL).
Attach Panels → inspanel flow initiates.
Tilt-up Panels → tiltup dialog or flow initiates.
Print Materials List → matl_dlg loads.
No crashes, no stale state, no infinite loops.

Test 43: Grid Lines Dialog (grid_dlg ← gl_dlg)¶

Prerequisite: Site drawing open. Trigger: Grid Lines from site hub. PB11 Reference: reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/gl_dlg.dcl (6,671 bytes)

Verify¶

Check	Expected
Dialog title	Grid line configuration
Grid line direction	X-axis, Y-axis, or both
Spacing fields	Numeric, multiple grid line definitions
Grid label fields	Alphanumeric designators (A, B, C… or 1, 2, 3…)
Layer assignment	Grid lines placed on correct layer
Accept/Cancel	Functional

Pass Criteria¶

Dialog loads. Grid definitions editable. Cancel returns cleanly.

Test 44: Wall Lines Dialog (wall_dlg ← wl_dlg)¶

Prerequisite: Site drawing open. Trigger: Wall Lines from site hub. PB11 Reference: reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/wl_dlg.dcl (8,485 bytes)

Verify¶

Check	Expected
Dialog title	Wall line configuration
Wall line definition fields	Offset, length, thickness
Wall type selections	Exterior, interior, parapet
Layer assignment	Wall lines on correct layer
Accept/Cancel	Functional

Pass Criteria¶

Dialog loads. Wall definitions editable.

Test 45: Slab Lines Dialog (slab_dlg ← sl_dlg)¶

Prerequisite: Site drawing open. Trigger: Slab Lines from site hub. PB11 Reference: reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/sl_dlg.dcl (7,791 bytes)

Verify¶

Check	Expected
Dialog title	Slab line configuration
Slab edge fields	Offset, thickness, elevation
Layer assignment	Slab lines on correct layer
Accept/Cancel	Functional

Pass Criteria¶

Dialog loads. Slab definitions editable.

Test 46: Batch Utilities Dialog (btch_dlg ← bu_dlg)¶

Prerequisite: Any drawing open. Trigger: ConstructiVision > Batch Utilities (extends doc 43 Test 20 with field detail). PB11 Reference: reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/bu_dlg.dcl (2,292 bytes)

Verify¶

Check	Expected
Dialog title	“Batch Utilities” or equivalent
Operation list	Available batch operations (redraw all, reprint, etc.)
Selection mechanism	Checkboxes or radio buttons for operation selection
Execute button	Initiates selected batch operation
Cancel button	Clean return

Pass Criteria¶

Dialog loads. Operations listed. Cancel returns cleanly.
Execute on at least one operation completes without error.

Test 47: Project Details Dialog (projdet ← np_dlg)¶

Prerequisite: New Project flow or Edit Project Details. Trigger: ConstructiVision > New Project or Edit Project Details (extends doc 43 Tests 1, 8). PB11 Reference: reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/np_dlg.dcl (801 bytes)

Verify¶

Check	Expected
Dialog title	“Project Details” or “New Project”
Project name	Editable text field
Concrete specs	PSI, PCF fields
Location fields	Address, city, state
Contractor fields	Name, superintendent
Accept/Cancel	Functional

Pass Criteria¶

All project metadata fields present and editable.
Values persist after Accept (verify via Edit Project Details round-trip).

Test 48: Plotter Selection Dialog (plt_dlg ← pltr)¶

Prerequisite: Print flow initiated. Trigger: Any print menu item (extends doc 43 Tests 13–15). PB11 Reference: reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/pltr.dcl (530 bytes)

Verify¶

Check	Expected
Dialog title	Plotter selection or print configuration
Plotter list	Populated from system plot devices (matches PB11 `PLTRLST`)
Plot style list	Populated from `.ctb` files (matches PB11 `PLTSLST`)
Selection mechanism	Dropdown or list selection
Accept/Cancel	Functional

Pass Criteria¶

Dialog loads. Plotter list populated. Selection persists.

Test 49: Footing Connection Dialog (ftconn) — Stub¶

Prerequisite: Site hub open. Trigger: Footing Connection from site hub. PB11 Reference: reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/ftconn.dcl (463 bytes)

Verify¶

Check	Expected
Stub message	“Not available” or “Not implemented” message appears
Clean return	No crash, no stale state

Pass Criteria¶

PARTIAL pass if stub message appears cleanly.
FAIL if crash or unhandled error.

Test 50: Drawing Type Detection (dwg_dlg replacement)¶

PB11 behavior: dwg_dlg dialog asks “Panel or Site?” when drawing type is ambiguous. TB11 behavior: Auto-detection from filename (*SITE* → site, else → panel).

Steps¶

Open a drawing whose filename contains “SITE” → should auto-detect as site.
Open a drawing whose filename does NOT contain “SITE” → should auto-detect as panel.
Open Drawing1 → should show progopts hub (no project loaded guard).

Pass Criteria¶

PASS if auto-detection works correctly for all three cases.
TB11’s auto-detection approach is an acceptable REPLACEMENT for PB11’s manual dwg_dlg chooser.

Test 51: Tech Support Dialog (csvtech)¶

Trigger: ConstructiVision > Tech Support (menu item loads and calls csvtech).

Steps¶

Click ConstructiVision > Tech Support.
csvtech dialog should load.

Verify¶

Check	Expected
Dialog loads	Yes (csvtech.dcl)
Contact info displayed	Support contact details shown
Close button	Clean return

Pass Criteria¶

Dialog loads and displays. Clean return on close.

Test 52: Registration Manager (csvreg)¶

Trigger: ConstructiVision > Registration Manager (direct command call). PB11 Reference: REGISTRATION / C:CSVREG VLX-only functions.

Steps¶

Click ConstructiVision > Registration Manager.
Registration dialog or handler fires.

Verify¶

Check	Expected
Some response	Either a dialog, a message, or a stub
No crash	Clean handling even if not fully implemented

Pass Criteria¶

DEFERRED — Registration/licensing is not required for parity. Clean stub acceptable.

Phase 3: Field Functionality & Data Flow (G3) — Tests 53–64¶

Phase 3 verifies that dialog fields actually work — data entered in one dialog flows correctly to other dialogs and to the drawing. This is the “does the data stick” gate.

Test 53: Project Data Round-Trip¶

Goal: Verify project metadata entered in New Project persists and is readable in Edit Project Details.

Steps¶

Create a New Project (Test 1 flow). Enter:
- Project name: PARITY-TEST-001
- PSI: 4000
- PCF: 150
- Contractor: Test Contractor
- Location: Test City, CA
Accept and close.
Immediately click Edit Project Details.
Verify all entered values are displayed correctly.

Pass Criteria¶

All 5 field values match what was entered. Zero data loss.

Test 54: Panel Data Round-Trip (mp_dlg → mp_dlg)¶

Goal: Verify panel dimensions entered in mp_dlg persist across close/reopen.

Steps¶

Open a panel drawing → mp_dlg.
Set panel width to 20'-0", height to 30'-0", thickness to 7 1/4".
Accept.
Immediately re-enter mp_dlg (Edit Current Drawing again).
Verify width, height, thickness display the values from step 2.

Pass Criteria¶

All 3 dimension values match. Zero data loss.

Test 55: Cross-Dialog Data Flow (mp_dlg → ch_dlg → mp_dlg)¶

Goal: Verify that entering chamfer data in ch_dlg persists when returning to mp_dlg and back.

Steps¶

From mp_dlg, open ch_dlg.
Set chamfer on left edge, 3/4” × 3/4”.
Accept back to mp_dlg.
Reopen ch_dlg.
Verify chamfer settings are retained.

Pass Criteria¶

Chamfer settings persist across dialog transitions.

Test 56: Cross-Dialog Data Flow (mp_dlg → dr_dlg → mp_dlg)¶

Goal: Verify door/recess data persists.

Steps¶

From mp_dlg, open dr_dlg.
Define one door opening: width 3'-0", height 7'-0", offset from left 5'-0".
Accept back to mp_dlg.
Reopen dr_dlg.
Verify door definition is retained.

Pass Criteria¶

Door opening definition persists.

Test 57: Cross-Dialog Data Flow (mp_dlg → wc_dlg → mp_dlg)¶

Goal: Verify weld connection data persists.

Steps¶

From mp_dlg, open wc_dlg.
Define a weld connection configuration.
Accept back to mp_dlg.
Reopen wc_dlg.
Verify weld connection settings are retained.

Pass Criteria¶

Weld connection settings persist.

Test 58: Cross-Dialog Data Flow (mp_dlg → bp_dlg → mp_dlg)¶

Goal: Verify base plate data persists.

Steps¶

From mp_dlg, open bp_dlg.
Define base plate dimensions.
Accept back to mp_dlg.
Reopen bp_dlg.
Verify base plate settings are retained.

Pass Criteria¶

Base plate settings persist.

Test 59: Cross-Dialog Data Flow (mp_dlg → fs_dlg → mp_dlg)¶

Goal: Verify feature strip data persists.

Steps¶

From mp_dlg, open fs_dlg.
Define a feature strip.
Accept back to mp_dlg.
Reopen fs_dlg.
Verify feature strip settings are retained.

Pass Criteria¶

Feature strip settings persist.

Test 60: Site Data Round-Trip (grid_dlg → grid_dlg)¶

Goal: Verify grid line data persists across close/reopen.

Steps¶

Open a site drawing → site hub → Grid Lines.
Define grid lines (e.g., 3 gridlines at 20’-0” spacing, labeled A/B/C).
Accept.
Reopen Grid Lines dialog.
Verify grid definitions are retained.

Pass Criteria¶

Grid line definitions persist.

Test 61: Site Data Round-Trip (wall_dlg → wall_dlg)¶

Goal: Verify wall line data persists.

Steps¶

Site hub → Wall Lines → define walls → Accept → reopen.
Verify wall definitions are retained.

Pass Criteria¶

Wall line definitions persist.

Test 62: Site Data Round-Trip (slab_dlg → slab_dlg)¶

Goal: Verify slab line data persists.

Steps¶

Site hub → Slab Lines → define slabs → Accept → reopen.
Verify slab definitions are retained.

Pass Criteria¶

Slab definitions persist.

Test 63: Data Hierarchy Verification¶

Goal: Verify the TB11 data retrieval hierarchy matches PB11: NOD XRecord → Title Block ATTRIB → Runtime Globals → convert.lsp defaults.

Steps¶

Open a panel drawing that has NOD XRecord data AND title block ATTRIBs.
Edit Current Drawing → mp_dlg.
Verify project name comes from NOD XRecord (not title block).
Delete the NOD XRecord (or open a drawing without one).
Verify project name falls back to title block ATTRIB.
Open Drawing1 (no XRecord, no title block).
Verify defaults from convert.lsp apply.

Pass Criteria¶

Data hierarchy fallback works correctly: XRecord > ATTRIB > Globals > Defaults.
No (exit) on missing data — clean fallthrough at each layer.

Test 64: NOD XRecord Persistence¶

Goal: Verify that TB11 writes and reads NOD XRecords in a format compatible with PB11.

Steps¶

Create a new panel (full flow: New Project → New Drawing → mp_dlg → set values → Accept).
Save the drawing.
Close and reopen the drawing.
Edit Current Drawing → mp_dlg.
Verify all values from step 1 are restored from NOD XRecord.

Optional Comparison¶

If PB11 is available on another VM: open the same drawing in PB11 and verify it reads the TB11-written XRecord correctly. This confirms write-format compatibility.

Pass Criteria¶

All panel data values survive save/close/reopen cycle.
NOD XRecord is the data source (verify via cv-debug.txt or command line trace).

Phase 4: NOD XRecord Format Compatibility (G4) — Tests 65–68¶

Phase 4 ensures data written by TB11 is readable by PB11 and vice versa. This is the “can a PB11 user open a TB11-saved drawing” gate.

Test 65: TB11 Writes → PB11 Reads (Panel)¶

Prerequisite: Access to two VMs — one with TB11, one with PB11.

Steps¶

On TB11 VM: Create panel, enter known values, save as parity-panel-01.dwg.
Copy parity-panel-01.dwg to PB11 VM.
On PB11 VM: Open the drawing → Edit Current Drawing.
Verify all panel values are displayed correctly in PB11.

Pass Criteria¶

PB11 reads all TB11-written panel data without error.
All field values match what TB11 wrote.

Test 66: PB11 Writes → TB11 Reads (Panel)¶

Prerequisite: Access to PB11 VM with an existing panel drawing.

Steps¶

On PB11 VM: Open an existing panel drawing, note all field values.
Copy the drawing to TB11 VM.
On TB11 VM: Open the drawing → Edit Current Drawing.
Verify all panel values are displayed correctly in TB11.

Pass Criteria¶

TB11 reads all PB11-written panel data without error.
All field values match what PB11 stored.

Test 67: TB11 Writes → PB11 Reads (Site)¶

Same as Test 65 but for a site drawing with grid lines, wall lines, and slab lines.

Pass Criteria¶

PB11 reads TB11-written site data without error.

Test 68: PB11 Writes → TB11 Reads (Site)¶

Same as Test 66 but for a site drawing.

Pass Criteria¶

TB11 reads PB11-written site data without error.

Phase 5: Drawing Operations (G5) — Tests 69–76¶

Phase 5 verifies that TB11 produces the same drawing geometry as PB11 — correct entities on correct layers with correct dimensions.

Note

G5 Parity Status: PARTIAL (May 7, 2026) — three panels at near-parity.

The full Phase 1-9 fix sequence (panatt section-on decoder, slab-dowel bypass-end shrink, HATCH dedupe, WC LEADER, feature-dim layer routing, cv-gui-draw cleanup, multi-panel batch runner, chamfer Outside/Inside/Both, plus pp/bp schema-variance fix and slot-9 leader-angle flip) closed the gap from 97/350 (28%) to within ±10 entities on three test panels:

Panel	Test entities	Golden / pre-DXF	Delta	Status
CSB001	346	350 (golden)	−4	⚠️ PARTIAL — user assessment “perfect”
CSB002	320	312 (pre-DXF)	+8	⚠️ PARTIAL — user assessment “perfect”
CSB003	339	330 (pre-DXF)	+9	⚠️ PARTIAL — user assessment “nearly perfect”

The remaining ±deltas are documented design-preferred deviations (BYLAYER classification per #170, combined MTEXT per #171, exploded title block per #174) plus minor leftover items not yet pinpointed.

Per-panel pre-DXF as golden: CSB002 and CSB003 use the pre-draw DXF state of the panel as the per-panel golden baseline (commit 2e776dcf3). This eliminates the need to manually curate a golden DXF for every new panel — the parity test compares “after the redraw” against “the panel as it existed before the redraw” which is exactly the right invariant for the redraw-after-edits use case.

Multi-panel batch parity: scripts/Run-BatchParity.ps1 (commit 54187fc02) sweeps every CSB*.dwg in a project folder, generates per- panel snap DXFs, and emits a single CSV summary. See “Phase 5b” at the end of this document.

Tooling: cv-dxf-compare.py (full identity comparison), Run-BatchParity.ps1 (multi-panel sweep with feature-coverage tracker at reports/batch-parity/seen-features.json).

Note

Historical April 19, 2026 baseline below — superseded by May 7 PARTIAL status.

Retained as a historical reference point showing where the test was before Phase 1-9 fixes landed. Per-feature deltas were diagnosed from this snapshot and used to prioritize the Phase work.

Feature Parity by Execution Order (April 19, 2026 — historical)

#	Feature	Layer(s)	Golden (DXF)	TB11 GUI	Delta	Status
1	3DSOLID geometry	solid, hardware	12	12	0	✅ 100%
2	CIRCLE hardware	hardware	11	11	0	✅ 100%
3	HATCH hardware	hardware	11	11	0	✅ 100%
4	HATCH feature	feature	5	6	+1	⚠️ 83%
5	Weld connection INSERTs	connections	7	7	0	✅ 100%
6	WC60 block count	connections	4	2	−2	❌ 50%
7	WC100 block count	connections	2	3	+1	⚠️ 67%
8	Connections dim (all entities)	connections_dim	63 raw	33 raw	−30	❌ 52%
9	Points INSERTs	points	6	6	0	✅ 100%
10	BP/PP block names	points	BP7-250ZZSuper_22XX	BP_7-25	wrong	❌ truncated
11	Points dim (all entities)	points_dim	39 raw	58 raw	+19	❌ 67%
12	Solid dim	solid_dim	52 raw	52 raw	0	✅ 100%
13	ELEV marker inserts	perimeter_dim	6	11	+5	⚠️ extra
14	Perimeter dim (all entities)	perimeter_dim	56 raw	162 raw	+106	❌ 35%
15	Feature dim (all entities)	feature_dim	38 raw	28 raw	−10	⚠️ 74%
16	Hardware dim	hardware_dim	9 raw	10 raw	+1	⚠️ 89%
17	TITLE block	perimeter	1	1	0	✅ 100%
18	BORDER block	perimeter	0	1	+1	❌ extra
19	NUM block	perimeter	1	1	0	✅ 100%
20	ATTRIB (title fields)	layer 0	25	22	−3	⚠️ 88%
21	SEQEND (R14 DXF format)	various	20	2	−18	❌ 10%

Fully correct (100%): 3D geometry, hardware circles/hatches, weld connection slots, points inserts, solid dim, title/num blocks — 7 of 21 feature groups at parity.

Remaining Fix Priority

Priority	Feature	Root Cause	Impact (DXF delta)
1	Perimeter dim over-count (#14)	basedim() generating too many tier rows — x-tier accumulation audit in progress	−106
2	Connections dim under-count (#8)	weldconn drawdim creates fewer TEXT/LEADER than golden	+30
3	WC60 count (#6)	wcl.txt type 6 entry — 2 active vs 4 expected	+2
4	Points dim over-count (#11)	bp/ppvar tier accumulation creating too many rows	−19
5	BORDER block extra (#18)	BORDER inserted but not in golden	−1
6	ATTRIB count (#20)	22 vs 25 — 3 title block ATTRIBs missing	+3
7	Block name truncation (#10)	BP_7-25 / PP_7-25 vs full PB11 names	structural
8	SEQEND format (#21)	DXF “2000” vs golden R14 format	−18

Next diagnostic: [DD-TIER] output (added April 19) prints x0–x5/y1–y2 tier list lengths before each basedim() call. Use to identify which tier accumulation is over-populated in the perimeter pass.

G5 Incremental Validation Plan — GUI Mode Feature Enablement (April 2026)¶

This plan adds one feature group at a time in the GUI pipeline (cv-gui-draw → drawpan → massprop → finpan → CVSNAP) until compare-dxf-entities.py reaches zero-diff against the golden DXF. Each step updates the status column in the Test 69–76 rows and appends an evidence row to doc 06.

Golden target: 256 entities (GUI DIMASSOC=1 golden, distinct from headless 350-entity golden)

Step 0 Baseline (DONE — csv_main_only=T)¶

Entity	Layer	Count
3DSOLID	solid	1
DIMENSION	perimeter_dim	5
IMAGE	perimeter	1
INSERT	solid_dim	1
LINE	perimeter	25
LINE	solid_dim	1
MTEXT	custom	1
TEXT	perimeter	40
TOTAL		75

FEATURE GATE Mechanism¶

In scripts/cv-gui-draw.lsp, replace (setq csv_main_only T) with the block below. Remove one group of nil assignments per step as that feature is validated.

(setq csv_main_only nil)       ; let drawpan read real mp* values from panatt
;; --- FEATURE GATE (advance one group per step) ---
;; Null out everything not yet validated; remove nulls as each step passes.
(setq mpfh nil  mpfv nil       ; features (horizontal/vertical)
      mpwc nil  mpwd nil       ; weld connections
      mppp nil  mpbp nil       ; pick/brace points
      mpro nil  mpts nil       ; rough openings, slot openings
      mpfs nil  mpss nil       ; formed/slab strips
      mpdr nil  mpdl nil       ; dowels, door/large openings
      mpsb nil  mprb nil       ; specific bracing, round blocks
      mppl nil  mpll nil       ; pilasters, ledger lines
      mptp nil  mplb nil       ; top plate, ledger bolts (hardware)
      mpsd nil)                ; slope diagram

Step 1 — Greenplate Hardware (green.lsp)¶

Enable: Remove mptp nil mplb nil from the gate. Drives: tpvar (top plate bolts) and lbvar (ledger bolts) arrays.

Entity	Layer	Golden	Expected add
3DSOLID	hardware	11	+11
CIRCLE	hardware	11	+11
HATCH	hardware	11	+11
LINE	hardware_dim	9	+9

Pass criterion: 3DSOLID|hardware=11, CIRCLE|hardware=11, HATCH|hardware=11 (no regression on step 0 entities). Doc 45: Update Test 69 (hardware geometry) status. Doc 06: Append evidence row — run-id, date-pair, snap entity counts.

Step 2 — Weld Connections (weldconn.lsp)¶

Enable: Remove mpwc nil mpwd nil from the gate. Drives: wcvar slots → WC60/WC100/WC120d block INSERTs + leader dimensions.

Entity	Layer	Golden	Expected add
INSERT	connections	7	+7
LEADER	connections_dim	2	+2
DIMENSION	connections_dim	4	+4

Pass criterion: INSERT|connections=7, LEADER|connections_dim=2. Doc 45: Update Test 70 (weld connections). Doc 06: Append evidence row.

Step 3 — Pick & Brace Points (pick.lsp, brace.lsp)¶

Enable: Remove mppp nil mpbp nil from the gate. Drives: ppvar (pick points) and bpvar (brace points) → BP/PP block INSERTs + points_dim.

Entity	Layer	Golden	Expected add
INSERT	points	6	+6
DIMENSION	points_dim	9	+9

Pass criterion: INSERT|points=6. Block names may differ (catalog vs dynamic) — count parity is the gate. Doc 45: Update Test 71 (pick/brace points). Doc 06: Append evidence row.

Step 4 — Openings (opening.lsp) — Iterative Sub-Steps¶

Enable one opening type at a time:

4a: Remove mpro nil (rough openings / rovar).
4b: Remove mpts nil (slot openings / tsvar).
4c: Remove mpfs nil mpss nil (formed/slab strips).
4d: Remove remaining opening-type nulls (mpwd nil mpdr nil mpdl nil mpsb nil).

For each sub-step: run CVSNAP, compare, verify only expected void 3DSOLIDs added, no regression. Doc 45: Update Test 72 sub-rows. Doc 06: One evidence row per sub-step.

Step 5 — Horizontal Features (feature.lsp)¶

Enable: Remove mpfh nil from the gate. Drives: fhvar strips → feature 3DSOLIDs + HATCH (EXPLODE) + feature_dim.

Entity	Layer	Golden	Expected
HATCH	feature	5	5–6 (AC2026 EXPLODE variance)
DIMENSION	feature_dim	38 raw	~37–38

Pass criterion: HATCH|feature within ±1 (known version difference); feature_dim within mode tolerance. Doc 45: Update Test 73 (features). Annotate AC2026 EXPLODE variance. Doc 06: Append evidence row.

Step 6 — Vertical Features (feature.lsp)¶

Enable: Remove mpfv nil (only if panel has active fvvar rows). Expected delta: Minimal for CSB001 — confirm zero delta. Doc 45: Update Test 73 (vertical sub-row).

Step 7 — Full Finpan Dimension Passes¶

Enable: Remove all remaining nulls; csv_main_only is already nil. Unlocks the 6-layer dimension pass in finpan.lsp (feature_dim, connections_dim, points_dim, hardware_dim, perimeter multi-item pass with ELEV markers).

Entity	Layer	Golden	Notes
CIRCLE	perimeter_dim	2	lbz/drz guards already fixed
LINE	perimeter_dim	large	DIM1 mode
INSERT	perimeter_dim	(ELEV)	6 in golden, 11 in test (state diff)
SOLID	various	18	DIM1 arrowheads

Pass criterion: compare-dxf-entities.py total diff within agreed tolerance (mode differences documented). Doc 45: Update Tests 74–76. Doc 06: Final evidence row + gate score.

Per-Step Procedure¶

Edit scripts/cv-gui-draw.lsp — remove the targeted nil assignments from the FEATURE GATE block.

Restore CSB001.dwg:

git checkout HEAD -- "src/Project Files/ConstructiVision Sample Building/CSB001.dwg"

Run the pipeline in AutoCAD GUI:

(load "C:/Users/chadw/ConstructiVision/scripts/cv-gui-draw.lsp")
(c:cv-gui-draw)

Wait for [GUI] Done.

Run the comparison:

python scripts/compare-dxf-entities.py reports/golden/CSB001-golden.dxf reports/auto-test/CSB001-snap.dxf

Verify expected entity counts match; confirm no regression on prior steps.
Update Doc 45 G5 test row: set status ✅/❌/🟡, record entity delta.
Update Doc 06: append evidence row with run-id, date-pair, snap path, result label.
SYNCPUSH the changed source files and doc updates.

Critical Files¶

File	Role
`scripts/cv-gui-draw.lsp`	FEATURE GATE block lives here — edit per step
`src/x64/TB11-01x64/drawpan.lsp`	Feature suppress logic (csv_main_only block, lines 345–353)
`src/x64/TB11-01x64/finpan.lsp`	6-layer dim pass gates (lines 233–277)
`src/x64/TB11-01x64/green.lsp`	Hardware bolt arrays
`src/x64/TB11-01x64/opening.lsp`	Void geometry
`src/x64/TB11-01x64/feature.lsp`	fhvar/fvvar strips
`src/x64/TB11-01x64/weldconn.lsp`	WC block inserts
`scripts/compare-dxf-entities.py`	Authoritative diff gate
`reports/golden/CSB001-golden.dxf`	256-entity GUI-mode golden target
`docs/source/modernization-2026/06-testing-validation.md`	Evidence log to update

Zero-Regression Rule¶

Before advancing any step: verify all entity counts from prior steps are unchanged in the new snap. A regression on a previously-passing TYPE|LAYER pair blocks the step — fix before advancing.

Test 69: Draw Panel — Basic Rectangle¶

Goal: Verify drawpan produces a rectangular panel solid with correct dimensions. Status: ⚠️ PARTIAL (May 7, 2026) — CSB001 346/350 (−4), CSB002 320/312 (+8), CSB003 339/330 (+9). Phase 1-9 closed the 97/350 gap. User assessment “nearly perfect” on all three. Remaining ±deltas are documented design-preferred deviations (#170/171/174) plus minor leftover items.

Tests 70-74 (openings, chamfers, feature strip, weld connections, base plate) are exercised implicitly by the same three panels — the 59-panel batch sweep now in flight will surface any panel that fails individually.

Headless Result (April 15, 2026 — accoreconsole.exe, AutoCAD 2027 x64, corrected golden)¶

Metric	Golden (PB11 VLX, restored original)	Test (TB11 source)	Match
Total DXF entities	350	97	❌ 28%
Entity type categories	59	2 match	❌ 3%
3DSOLID geometry	12	44	⚠️ different distribution
DIMENSIONs	20	0	❌ 0%
HATCHes	16	0	❌ 0%
ATTRIBs (block data)	73	0	❌ 0%
Annotation INSERTs	29	0	❌ 0%
Annotation TEXT/MTEXT	39+24	5+4	❌ ~14%
Annotation LINEs	78	1	❌ 1%

Drawing: CSB001.dwg (ConstructiVision Sample Building panel 001) — panel with openings, feature strips, J-bolt hardware, green plate, chamfers, and weld connections.

What TB11 produces correctly: Main panel solid, feature extrusions (8 3DSOLID|feature), greenplate (1 3DSOLID|greenplate), J-bolt hardware (34 3DSOLID + 32 INSERT), perimeter outline (2 LWPOLYLINE), basic text labels.

What TB11 is missing: ALL dimension annotations (DIMENSIONs, dimension LINEs, dimension TEXTs, dimension SOLIDs/arrows), ALL hatches (feature and hardware), ALL block INSERT annotations (connections, points, features, perimeter markers), ALL ATTRIBs. The finpan/drawdim pipeline is not generating annotation layers.

Headless limitations (in addition to entity gap):

TRIM skipped (AutoCAD 2027 crossing-window mode hang)
INTERFERE skipped (native crash in Core Console)

Evidence:

Golden DXF: reports/golden/CSB001-golden.dxf (529,641 bytes, from restored original 183,286-byte CSB001.dwg)
Test DXF: reports/auto-test/CSB001-snap.dxf (97 entities)
Comparison: python scripts/cv-dxf-compare.py → *** FULL DXF PARITY: FAIL ***
Test runner: scripts/Run-ParityTest.ps1 (copies original before test, verifies original unchanged after)

Steps (original — for GUI re-validation)¶

Create new panel: width 10'-0", height 20'-0", thickness 7 1/4".
Accept all dialogs → panel drawing executes.
Verify the generated geometry:
- Rectangular solid on solid layer.
- Dimensions match: 120” × 240” × 7.25” (converted to inches).
- Perimeter outline on perimeter layer.
- Dimension annotations on *_dim layers.

Pass Criteria¶

Panel geometry exists with correct dimensions.
Correct layers used.
Visual match to PB11-generated panel of same dimensions (screenshot comparison if available).

Test 70: Draw Panel — With Openings¶

Goal: Verify panel with door/recess openings draws correctly.

Steps¶

Create panel with one door opening (3’-0” wide × 7’-0” high, offset 5’-0” from left).
Verify opening appears as void in panel solid.
Verify opening dimensions annotated correctly.

Pass Criteria¶

Opening geometry present at correct location and size.

Test 71: Draw Panel — With Chamfers¶

Goal: Verify chamfered edges draw correctly.

Steps¶

Create panel with chamfer on all four edges, 3/4” × 3/4”.
Verify chamfer geometry appears on correct layer.

Pass Criteria¶

Chamfer lines present on all four edges with correct dimensions.

Test 72: Draw Panel — With Feature Strip¶

Goal: Verify feature strip (reveal/rustication) draws correctly.

Steps¶

Create panel with a horizontal feature strip.
Verify feature geometry appears on feature layer.

Pass Criteria¶

Feature strip geometry present at correct position.

Test 73: Draw Panel — With Weld Connections¶

Goal: Verify weld connection hardware draws correctly.

Steps¶

Create panel with weld connections specified.
Verify weld connection indicators appear on connections layer.

Pass Criteria¶

Connection hardware symbols present at specified positions.

Test 74: Draw Panel — With Base Plate¶

Goal: Verify base plate draws correctly.

Steps¶

Create panel with base plate specified.
Verify base plate geometry appears on correct layer.

Pass Criteria¶

Base plate geometry present with correct dimensions.

Test 75: Draw Site — Grid + Wall + Slab Lines¶

Goal: Verify site drawing with all three line types draws correctly.

Steps¶

Create site drawing with grid lines, wall lines, and slab lines.
Verify each type appears on its respective layer.
Verify dimensions match specifications.

Pass Criteria¶

All three line types present on correct layers with correct geometry.

Test 76: Draw Site — Attach Panels¶

Goal: Verify panel attachment to site works correctly.

Steps¶

Have site drawing with wall lines.
Use Attach Panels function.
Verify panel references attach to wall lines at correct positions.

Pass Criteria¶

Panels attached at wall positions. Panel XRef or block insert visible.

Phase 6: Print & Output (G6) — Tests 77–80¶

Test 77: Print — Panel All Layers¶

Goal: Verify full panel print produces correct output.

Steps¶

Panel drawing open → Print > Panel > All Layers.
Print dialog appears → select a printer (or DWF/PDF driver).
Execute print.

Pass Criteria¶

Print dialog appears with plotter list.
Print completes without error.
Layers restored after print.

Test 78: Print — Panel Layer Presets (5 variants)¶

Goal: Verify each layer preset isolates the correct layers for print.

Steps¶

For each of the 5 presets (Edge Form, Ledgers/Top Plate, Weld Connections, Feature Strip, Pick/Brace Points):

Execute the preset print menu item.
Verify only the specified layers are visible when print dialog appears.
Cancel or complete print.
Verify all layers restored afterward.

Pass Criteria¶

Layer isolation matches the spec in doc 43 Test 14 for each preset.

Test 79: Print — Site Select Layouts¶

Goal: Verify site print with layout selection.

Steps¶

Site drawing open → Print > Site > Select Layouts.
Verify correct layer isolation.
Print dialog appears.

Pass Criteria¶

Layer isolation correct. Print dialog functional.

Test 80: Materials List Print¶

Goal: Verify materials list output.

Steps¶

Panel drawing open with panel data → Materials List.
matl_dlg shows quantities.
Print or export the materials list.

Pass Criteria¶

Materials quantities display correctly.
Print/export produces correct output format.

Phase 7: Error Handling & Edge Cases — Tests 81–88¶

Test 81: All Dialogs — Cancel Behavior¶

Goal: Every dialog in Phases 2–3 must have clean Cancel behavior.

Steps¶

For each dialog tested in Phases 2–3: open it, DON’T change anything, click Cancel.
Verify: no data mutation, no stale state, clean return to Command: or parent dialog.

Pass Criteria¶

Zero dialogs leave stale state after Cancel.

Test 82: All Dialogs — Invalid Input¶

Goal: Verify dialogs reject invalid input gracefully.

Steps¶

For each numeric field in mp_dlg, ch_dlg, slope_dlg, etc.:
- Enter text where number expected (e.g., “abc” in width field).
- Enter zero or negative values.
- Enter extremely large values (e.g., 99999).
Verify: validation message or rejection. No crash.

Pass Criteria¶

No crashes on invalid input. Validation messages appear where appropriate.

Test 83: Module Load — Missing File Resilience¶

Goal: Verify that a missing .lsp file produces a clear error, not a silent failure.

Steps¶

Temporarily rename one .lsp module (e.g., chamfer.lsp → chamfer.lsp.bak).
Restart AutoCAD. Trigger a CV menu item.
Verify: [CV-LOAD ERROR] message on command line identifying the missing file.
Restore the file.

Pass Criteria¶

Missing file produces clear error message with filename.
AutoCAD does not crash. Other modules still functional.

Test 84: Cross-Document Open — Drawing Switch¶

Goal: Verify that opening a different drawing via Open Drawing correctly switches context.

Steps¶

Have panel drawing A open.
ConstructiVision > Open Drawing → select panel drawing B.
Verify: Drawing B opens, panel data from B is loaded (not A’s data).
Edit Current Drawing → mp_dlg shows B’s values.

Pass Criteria¶

Drawing context switches completely. No data bleed from A to B.

Test 85: New Project Overwrites — Guard¶

Goal: Verify creating a new project when one is already loaded works correctly.

Steps¶

Open an existing project drawing.
ConstructiVision > New Project.
Verify: appropriate behavior (either prompt to save current, or create new project in new folder).

Pass Criteria¶

No data loss from the existing project. Clear flow.

Test 86: SFSP (Support File Search Path) Verification¶

Goal: Verify all required files are findable via AutoCAD’s search path.

Steps¶

On command line, run: (findfile "csv.lsp") — should return path.
Repeat for: csvmenu.lsp, md_dlg.dcl, mp_dlg.dcl, ch_dlg.dcl, slope_dlg.dcl.
All should return non-nil paths.

Pass Criteria¶

All core files findable. Zero nil returns.

Test 87: Debug Log Verification¶

Goal: Verify C:\cv-debug.txt is written with correct state after every c:csv call.

Steps¶

Delete C:\cv-debug.txt if it exists.
Trigger any CV menu item.
Verify C:\cv-debug.txt exists and contains:
- filedia, cmdecho values
- progcont value matching the menu item triggered
- curdir, olddwg values
- Timestamp

Pass Criteria¶

Debug log written. Values match expected state.

Test 88: Error Handler — error Function¶

Goal: Verify the custom *error* handler prints [CSV-ERROR] and restores sysvars.

Steps¶

Trigger an intentional error condition (e.g., call a CV function when no drawing is loaded in a way that causes an error).
Verify: [CSV-ERROR] prefix appears on command line with the error message.
Verify: filedia and cmdecho are restored to their pre-CV values.

Pass Criteria¶

Error handler fires. Message includes [CSV-ERROR]. Sysvars restored.

Phase 8: PB11 VLX-Specific Behaviors — Tests 89–92¶

These tests verify behaviors observed in the PB11 VLX runtime dump that TB11 must replicate.

Test 89: CSVDIR / CSVVER / PJDIR Globals¶

Goal: Verify TB11 sets the same global variables PB11 uses.

Steps¶

After loading CV, on command line:
- (princ csvdir) — should print ConstructiVision install path.
- (princ csvver) — should print version string (e.g., “11.01” for TB11).
- (princ pjdir) — should print Project Files directory path.

Pass Criteria¶

All three globals set. Paths are valid directories on disk.

Test 90: PROGCONT State After Each Menu Item¶

Goal: Verify progcont is set correctly by each menu macro and read correctly by csv.lsp.

Steps¶

For each menu item, after clicking it:

Check cv-debug.txt for progcont value.
Verify it matches the expected value from the csv.mnu macro table.

Menu Item	Expected progcont
Edit Current Drawing	1
New Drawing	262161
Open Drawing	262145
New Project	262153
Edit Project Details	524289
View All Layers	262209
View Select Layers	262273
Print All Layers (Panel)	262465
Print Layer Presets	262401
Print Site Select Layouts	262657
Materials List	263169
Revision History	264193
Batch Utilities	262177
Slope Calculator	8193

Pass Criteria¶

Every menu item sets progcont to the correct value. Zero mismatches.

Test 91: DCL Dialog Handle Pre-Loading¶

Goal: Verify TB11 pre-loads dialog handles at startup (matching PB11’s DCL_* constant system).

Note

TB11 may not replicate the numeric DCL_* handle system — it may load dialogs on-demand instead. This test verifies the RESULT (dialogs load quickly, no “file not found” errors) rather than the mechanism.

Steps¶

Fresh AutoCAD launch.
Rapidly click through 5+ different menu items that load different dialogs.
Verify: no dialog load delays, no load_dialog failures, no “dcl not found” errors.

Pass Criteria¶

All dialogs load on first invocation. Zero load failures.

Test 92: Plotter List Population¶

Goal: Verify TB11 populates plotter lists like PB11 (PLTRLST, PLTSLST).

Steps¶

Trigger any print menu item.
Verify plotter selection dialog shows available system plotters.
On command line (if accessible): (princ pltrlst) or check if plotter dropdown is populated.

Pass Criteria¶

Plotter list populated from system. Not empty.

Section 9: DEFERRED Tests (Out of Parity Scope)¶

These features are deliberately excluded from the parity gate with documented justification.

#	Feature	PB11 Function(s)	Justification
D1	Password/Registration	`pass_dlg`, `REGISTRATION`, `SECCHECK`, `C:CSVREG`	Licensing system redesigned for modern distribution. PB11’s registration mechanism is obsolete.
D2	Help System (HLP)	`C:CSVHELP`, `csv.hlp`	WinHelp (`.hlp`) format deprecated since Vista. Help being rebuilt as HTML/web.
D3	About Dialog (HLP)	`C:CSVABT`	Implemented via `csv.hlp` which is deprecated. A new About dialog can be trivially created.
D4	Progress Indicator	`progress` (145 bytes)	UI convenience only. Trivial to add post-parity.

Deferred count: 4 (within ≤5 threshold)

Section 10: BLOCKED Tests — Reconstruction Backlog¶

These PB11 features have no TB11 implementation. They cannot be tested. Each requires reconstruction from the extracted PB11 DCL dialogdefinitions + v3.60 source logic.

Priority 0 — CRITICAL (blocks multi-story tilt-up)¶

#	PB11 Dialog	DCL Size	Purpose	Effort	DFMEA
B1	`rc_dlg`	7,643 B	Roof joist/girder layout	Medium	NEW
B2	`sc_dlg`	7,651 B	2nd floor joist/girder layout	Medium	NEW
B3	`tc_dlg`	7,650 B	3rd floor joist/girder layout	Medium	NEW
B4	`so_dlg`	7,557 B	Standard opening details	Medium	NEW

Note

The three joist/girder dialogs (sc_dlg, tc_dlg, rc_dlg) are nearly identical in DCL size and structure. Build one, replicate to the other two — the effort is medium for the first, trivial for copies.

Priority 1 — HIGH (blocks full panel feature set)¶

#	PB11 Dialog	DCL Size	Purpose	Effort	DFMEA
B5	`lt_dlg`	10,950 B	Ledger and top plate details	High	NEW
B6	`global`	640 B	Global change options (batch panel updates)	Low	NEW
B7	`ftconn` (full)	463 B	Footing embed selection (currently stub)	Low	NEW

Priority 2 — MEDIUM (engineering extras)¶

#	PB11 Dialog	DCL Size	Purpose	Effort	DFMEA
B8	`ee_dlg`	4,976 B	Engineering data extraction	Medium	NEW
B9	`page_2`	4,216 B	Engineering data extraction page 2	Medium	NEW

Site Operations — UNKNOWN (need PB11 testing to define)¶

#	ms_dlg Key	Label	Status
B10	32mst1	Create/Modify Viewports	Unknown behavior — need PB11 test
B11	128mst1	Detach Panels	Unknown behavior — need PB11 test
B12	512mst1	Construction Layout	Unknown behavior — need PB11 test

Section 11: Parity Test Matrix — Master Scorecard¶

Use this matrix to track progress. Update status after each test execution.

Phase 1: Menu Routing (G1)¶

Test	Description	Status
1	New Project (Drawing1)	🔲
2	New Drawing (Panel)	🔲
3	New Drawing (Site)	🔲
4	Edit Current Drawing (Panel)	🔲
5	Edit Current Drawing (Site)	🔲
6	Edit Current Drawing (No Project)	🔲
7	Open Drawing	🔲
8	Edit Project Details (project open)	🔲
9	Edit Project Details (no project)	🔲
10	View All Layers	🔲
11	View Select Layers (Panel)	🔲
12	View Select Layers (Site)	🔲
13	Print All Layers (Panel)	🔲
14	Print Layer Presets (5× Panel)	🔲
15	Print Site Select Layouts	🔲
16	Materials List (panel)	🔲
17	Materials List (no panel)	🔲
18	Revision History (with UPDATE)	🔲
19	Revision History (no panel)	🔲
20	Batch Utilities	🔲
21	Slope Calculator	🔲
22	Viewport Views (10 items)	🔲
23	Shading Modes (3 items)	🔲
24	Program Options Hub Buttons	🔲
25	Bug 92 Guard — Progcont on Drawing1	🔲
26	Module Loading Verification	🔲

Phase 2: Dialog Appearance (G2)¶

Test	Description	Status
27	Main Panel Dialog (mp_dlg) — Fields	🔲
28	Panel Lines (pl_dlg)	🔲
29	Chamfer (ch_dlg)	🔲
30	Door/Recess (dr_dlg)	🔲
31	Detail Lines (dl_dlg)	🔲
32	Feature/Shape (fs_dlg)	🔲
33	Side Detail (sd_dlg)	🔲
34	Base Plate (bp_dlg)	🔲
35	Weld Connections (wc_dlg)	🔲
36	Panel Properties (pp_dlg)	🔲
37	Invariable Data (invar)	🔲
38	Slope Calculator — Field Detail	🔲
39	Revision — Field Detail	🔲
40	Warning Dialog	🔲
41	Panel Options Hub (md_dlg) — Routing	🔲
42	Site Hub (ms_dlg / sdwg_dlg) — Routing	🔲
43	Grid Lines (grid_dlg)	🔲
44	Wall Lines (wall_dlg)	🔲
45	Slab Lines (slab_dlg)	🔲
46	Batch Utilities — Field Detail	🔲
47	Project Details (projdet) — Fields	🔲
48	Plotter Selection (plt_dlg)	🔲
49	Footing Connection — Stub	🔲
50	Drawing Type Detection	🔲
51	Tech Support (csvtech)	🔲
52	Registration Manager	🔲

Phase 3: Field Functionality (G3)¶

Test	Description	Status
53	Project Data Round-Trip	🔲
54	Panel Data Round-Trip	🔲
55	Cross-Dialog: mp_dlg → ch_dlg	🔲
56	Cross-Dialog: mp_dlg → dr_dlg	🔲
57	Cross-Dialog: mp_dlg → wc_dlg	🔲
58	Cross-Dialog: mp_dlg → bp_dlg	🔲
59	Cross-Dialog: mp_dlg → fs_dlg	🔲
60	Site Data: grid_dlg Round-Trip	🔲
61	Site Data: wall_dlg Round-Trip	🔲
62	Site Data: slab_dlg Round-Trip	🔲
63	Data Hierarchy Verification	🔲
64	NOD XRecord Persistence	🔲

Phase 4: XRecord Compatibility (G4)¶

Test	Description	Status
65	TB11 → PB11 Read (Panel)	🔲
66	PB11 → TB11 Read (Panel)	🔲
67	TB11 → PB11 Read (Site)	🔲
68	PB11 → TB11 Read (Site)	🔲

Phase 5: Drawing Operations (G5)¶

Test	Description	Status	Date	Bug #
69	Draw Panel — Basic Rectangle	❌ FAIL	2026-04-15	—
70	Draw Panel — With Openings	❌ FAIL	2026-04-15	—
71	Draw Panel — With Chamfers	❌ FAIL	2026-04-15	—
72	Draw Panel — With Feature Strip	❌ FAIL	2026-04-15	—
73	Draw Panel — With Weld Connections	❌ FAIL	2026-04-15	—
74	Draw Panel — With Base Plate	❌ FAIL	2026-04-15	—
75	Draw Site — Grid + Wall + Slab	🔲
76	Draw Site — Attach Panels	🔲

Warning

Tests 69–74 scored FAIL: TB11 produces 97 entities vs 350 in the restored golden baseline (28%). The prior “447/447 PASS” was invalid — the golden was exported from a mangled CSB001.dwg that had been overwritten by repeated drawpan runs. TB11 produces the 3D geometry (solids, extrusions, hardware) but is missing ALL dimension annotations, ALL hatches, ALL block-insert annotations, and ALL ATTRIBs. The finpan/drawdim annotation pipeline is the primary gap. Tests 75–76 (site drawing) are not yet tested.

Phase 6: Print & Output (G6)¶

Test	Description	Status
77	Print Panel All Layers	🔲
78	Print Panel Layer Presets (5×)	🔲
79	Print Site Select Layouts	🔲
80	Materials List Print	🔲

Phase 7: Error Handling¶

Test	Description	Status
81	All Dialogs — Cancel Behavior	🔲
82	All Dialogs — Invalid Input	🔲
83	Module Load — Missing File	🔲
84	Cross-Document Drawing Switch	🔲
85	New Project Overwrite Guard	🔲
86	SFSP Verification	🔲
87	Debug Log Verification	🔲
88	Error Handler error Function	🔲

Phase 8: PB11-Specific Behaviors¶

Test	Description	Status
89	CSVDIR / CSVVER / PJDIR Globals	🔲
90	PROGCONT State Per Menu Item	🔲
91	DCL Dialog Handle Loading	🔲
92	Plotter List Population	🔲

Section 12: Parity Completion Summary¶

Total tests defined: 92 (Tests 1–92) DEFERRED: 4 (Registration, Help, About, Progress) BLOCKED: 12 (10 MISSING dialogs + 3 unknown site operations, minus 1 overlap)

Testable now: 92 − 4 DEFERRED = 88 tests executable

Gate Completion Formula¶

$$\text{Parity %} = \frac{\text{PASS} + \text{PARTIAL}}{\text{Total} - \text{DEFERRED} - \text{BLOCKED}} \times 100$$

Denominator (testable): 92 − 4 − 12 = 76 tests

Parity achieved when:

$\frac{\text{PASS} + \text{PARTIAL}}{76} \geq 95%$ (≥ 73 of 76 tests pass)
Zero FAIL results in Phase 1 (menu routing — G1)
Zero FAIL results in Phase 4 (XRecord compatibility — G4)
All FAIL results in other phases have bugs filed in doc 32 with DFMEA linkage
All BLOCKED items documented in Section 10 with reconstruction priority

DFMEA Cross-Reference¶

Test Range	Risk Area	Existing DFMEA	New DFMEA Needed
1–26	Menu routing	DFMEA-001 through DFMEA-035	—
27–40	Dialog appearance	DFMEA-010 (dialog load)	DFMEA-036: sub-dialog load failure
41–42	Hub routing	DFMEA-003 (progcont mismatch)	DFMEA-037: hub button dead-end
53–64	Data persistence	DFMEA-020 (XRecord)	DFMEA-038: cross-dialog data loss
65–68	XRecord compat	—	DFMEA-039: PB11↔TB11 format incompatibility
69–76	Drawing ops	DFMEA-025 (draw failure)	DFMEA-040: geometry dimension mismatch
77–80	Print	DFMEA-030 (print)	—
81–88	Error handling	DFMEA-019 (silent failure)	DFMEA-041: unhandled edge case crash
89–92	PB11 behaviors	—	DFMEA-042: runtime state divergence

Appendix A: Progcont Encoding Reference¶

TB11 uses named constants (*pc-edit-current*, *pc-new-drawing*, etc.) defined in csvconst.lsp. PB11 uses raw bitmask values. The encoding pattern:

$$\text{progcont} = 2^{18} + \text{PB11_bitmask} + 1$$

Where $2^{18} = 262144$ is the “menu-sourced” flag.

PB11 Bitmask	+ 262144 + 1	TB11 progcont	Named Constant
0	262145	262145	`pc-open-drawing`
8	262153	262153	`pc-new-project`
16	262161	262161	`pc-new-drawing`
32	262177	262177	`pc-batch-utils`
64	262209	262209	`pc-view-all`
128	262273	262273	`pc-view-select`
256	262401	262401	`pc-print-setup`
320	262465	262465	`pc-print-all`
512	262657	262657	`pc-print-select`
1024	263169	263169	`pc-materials`
2048	264193	264193	`pc-revision`
8192	—	8193	`pc-slope-calc` (exception)
—	—	1	`pc-edit-current` (no bit 18)
—	—	524289	`pc-edit-project` (bit 19 + 1)

Appendix B: Extracted PB11 DCL File Locations¶

All PB11 dialog definitions extracted from VLX as plain text:

reports/vlx-analysis/dcl-extracted/PB11-v11/individual-dialogs/
├── bp_dlg.dcl      (1,584 B)
├── bo_dlg.dcl     (11,803 B)
├── bu_dlg.dcl      (2,292 B)
├── ch_dlg.dcl      (1,770 B)
├── dl_dlg.dcl      (1,428 B)
├── dr_dlg.dcl      (5,637 B)
├── dwg_dlg.dcl       (409 B)
├── ee_dlg.dcl      (4,976 B)
├── fs_dlg.dcl      (3,283 B)
├── ftconn.dcl        (463 B)
├── gl_dlg.dcl      (6,671 B)
├── global.dcl        (640 B)
├── invar.dcl       (1,316 B)
├── lt_dlg.dcl     (10,950 B)
├── md_dlg.dcl      (1,925 B)
├── mp_dlg.dcl      (5,456 B)
├── ms_dlg.dcl      (1,625 B)
├── np_dlg.dcl        (801 B)
├── page_2.dcl      (4,216 B)
├── pass_dlg.dcl      (121 B)
├── pl_dlg.dcl      (3,063 B)
├── play.dcl          (288 B)
├── pltr.dcl          (530 B)
├── pp_dlg.dcl      (1,655 B)
├── progress.dcl      (145 B)
├── rc_dlg.dcl      (7,643 B)
├── revision.dcl    (1,101 B)
├── sc_dlg.dcl      (7,651 B)
├── sd_dlg.dcl      (4,044 B)
├── sl_dlg.dcl      (7,791 B)
├── slope_dlg.dcl     (700 B)
├── so_dlg.dcl      (7,557 B)
├── tc_dlg.dcl      (7,650 B)
├── warning.dcl       (169 B)
├── wc_dlg.dcl      (6,361 B)
└── wl_dlg.dcl      (8,485 B)

These are the authoritative UI specification for PB11. Every field key, label, layout constraint, and button in these files defines what TB11 must replicate.

Phase 5b: Multi-panel Batch Parity (May 2026)¶

After Phase 5 closed the single-panel CSB001 entity-count gap, the validation focus shifted to scaling parity testing across an entire customer project. The original golden-curation model — hand-export a CSB001-golden.dxf and diff against it — does not scale to 59 panels per project, much less 1000+ panels across multiple projects. Phase 5b solves this with two architectural pieces.

Per-panel pre-DXF as golden¶

For any panel beyond CSB001, the per-panel “golden” is the DXF state of the panel before c:cv-auto-draw runs. The parity check then compares the post-redraw DXF against that pre-redraw baseline. This is exactly the right invariant for the redraw-after-edits use case: “the redraw should produce what was there before, plus the new dims/annotations the redraw is supposed to add.”

Concretely, Run-BatchParity.ps1 (commit 54187fc02) does:

Capture pre-DXF: open the panel, run DXFOUT before any redraw, save as reports/batch-parity/CSBNNN-pre.dxf.
Run c:cv-auto-draw to redraw the panel.
Capture post-DXF: reports/batch-parity/CSBNNN-snap.dxf.
Compare entity totals between pre and post; emit a single CSV row per panel.

The pre-DXF carries forward into version control as the per-panel golden. If a future regression breaks a panel, the diff against its pre-DXF is the diagnostic.

Feature-coverage matrix¶

reports/batch-parity/seen-features.json accumulates first-seen markers for every mp* feature flag the batch sweep encounters. As of May 7, 2026 it tracks mpch, mpdr, mpsd, mpfh, mpwc from CSB001/002/003. After the 59-panel sweep this surfaces:

Which feature flags are exercised by any panel in the project (covered).
Which flags are NEVER exercised — meaning Phase 1-9 fixes for that path are unverified against real data (gap).

Pilasters (mppl), lift bars (mplb), round blocks (mprb), and dock levelers (mpdl) are the headline known-gap features. If the 59-panel sweep doesn’t exercise them, the next step is to point Run-BatchParity.ps1 -ProjectDir <other-project> at a customer dataset that does.

Script invocation¶

# Default: full sweep of CSB Sample Building (59 panels, ~15 min)
powershell -ExecutionPolicy Bypass -File scripts/Run-BatchParity.ps1

# Filter to specific panels
powershell -ExecutionPolicy Bypass -File scripts/Run-BatchParity.ps1 -Panels CSB001,CSB005

# Different project folder
powershell -ExecutionPolicy Bypass -File scripts/Run-BatchParity.ps1 -ProjectDir "C:/path/to/other/project"

Outputs¶

reports/batch-parity/run-<timestamp>.csv — one row per panel: panel, entity_total, golden_total, delta, features_active, status (PASS/PARTIAL/FAIL/UNBLESSED), failure_reason
reports/batch-parity/latest.md — markdown summary with pass/fail counts and per-feature coverage
reports/batch-parity/seen-features.json — feature-coverage tracker (cumulative across runs)
reports/batch-parity/CSBNNN-pre.dxf, -snap.dxf, -snap.txt per panel
reports/batch-parity/CSBNNN.log — per-panel accoreconsole log for failure triage

Status¶

The Feature Parity by Execution Order table (April 19, 2026 historical baseline above) will be regenerated from a real batch run once the 59-panel sweep produces enough evidence to populate every column. Until then, treat that table as a snapshot of where the test was before Phase 1-9 fixes landed.

Re-baseline policy (Bug 139 / DFMEA-068, 2026-05-07)¶

The per-panel pre-DXF strategy works for catching regressions but conflates “real bug” with “fix applied since baseline” when source-code structurally changes which entities the redraw produces. Resolution: a three-tier baseline cascade in Run-BatchParity.ps1 with explicit re-baseline operation.

Comparison priority (high → low):

reports/batch-parity/<panel>-expected.dxf — locked-in reference baseline. Only created for panels that have been independently validated as correct.
reports/batch-parity/<panel>-pre.dxf — auto-regenerated each run by cv-auto-draw from the DWG’s rest state.
reports/golden/<panel>-golden.dxf — legacy hand-curated golden (CSB001 only).

Re-baseline scope rule (NON-NEGOTIABLE):

Only re-baseline panels that are PASS or PARTIAL OR have been independently visually validated. Never bulk-re-baseline a corpus that has FAIL panels — doing so silently locks the bugs in as the new “correct” state and removes the parity gate’s ability to flag them. (The 2026-05-07 mistake: bulk-baselined all 59 panels, including 37 FAIL panels, which produced a misleading 59 PASS / 0 PARTIAL / 0 FAIL report. Reverted same day.)

Per-panel re-baseline operation (run after each panel is individually validated):

cd reports/batch-parity/
cp <PANEL>-snap.dxf <PANEL>-expected.dxf

For corpus-wide application, restrict to PASS panels (Δ=0) of the most recent sweep, plus any PARTIAL panel the user has visually confirmed. Always preserve the pre-rebaseline run CSV as pre-rebaseline-reference.csv.

First application (2026-05-07, post-A6 1c613c30):

Initial blanket re-baseline applied to all 59 panels — caught and reverted within hours when user recognized the misleading “100% PASS” report. Selective re-baseline applied 2026-05-07-21:33: kept expected.dxf only for CSB001 / CSB002 / CSB003 (user-confirmed “nearly perfect” via Phase 1-9 work). The remaining 56 panels fall back to pre.dxf comparison.

Resulting distribution after selective re-baseline:

Status	Pre-rebaseline reference	Selective re-baseline (current)
PASS	2 (CSB024, CSB032 — natural Δ=0)	5 (+ CSB001, CSB002, CSB003)
PARTIAL	20	17
FAIL	37	37 (all preserved — real defects per DFMEA-066, DFMEA-069, etc.)

When NOT to re-baseline:

Without a structural source-code change for the specific panel, re-baseline silently locks real regressions in as the new “correct” state.
Re-baseline is a deliberate engineering act per panel, not a regular bulk operation.
Always preserve the pre-rebaseline run CSV as a reference snapshot.
If unsure whether a panel’s current state is correct, don’t re-baseline.

Phase B: Multi-project parity sweep (2026-05-09, FINAL — 22 folders / 1,375 panels)¶

After Phase 5b proved the per-panel pre-DXF model on the 59-panel CSB corpus, Phase B extends the sweep to the entire src/Project Files/ tree. The orchestrator scripts/Run-AllProjectsParity.ps1 walks recursively (excluding backup subdirs), per-project output goes to reports/batch-parity/<slug>/, and a cross-project rollup lands at reports/batch-parity/all-projects-rollup.{csv,md} plus ALL-PROJECTS-FINDINGS.md for the analysis layer.

v1 sweep (2026-05-08 overnight, 5h47m): 12 top-level folders, 799 panels. Missed 10 nested folders (recursive walk wasn’t enabled). v2 sweep (2026-05-08 overnight, 30 min added): resumed with recursive walk + skip-if-exists; ran the missing 9 panel-bearing nested folders. Final aggregate (22 folders, 1,375 panels): 35 PASS / 109 PARTIAL / 1,231 FAIL / 0 ERROR — 10.5% pass-or-partial; 70.8% average symmetric parity.

Symmetric parity scoring¶

Phase B adds a symmetric parity metric to complement the binary PASS/PARTIAL/FAIL gate:

parity_pct = 100 × min(snap_total, golden_total) / max(snap_total, golden_total)

Treats over-emit and under-emit equally — 130% (TB11 emits 30% extra) and 70% (TB11 emits 30% less) score the same. 100% = perfect, 0% = no overlap. Distribution across 1,375 panels: 277 (20.1%) at ≥90%, 584 (42.5%) at ≥75%, 1,172 (85.2%) at ≥50%.

Per-project parity columns reported in the rollup:

Avg — mean parity across the project’s panels.
Median — middle panel’s parity (50th percentile).
P10 — worst-10% cutoff: 10% of panels score at or below P10.
P90 — best-10% cutoff: 10% of panels score at or above P90.
Spread (P90 − P10) — project consistency. Tight = uniform behavior, wide = bimodal.

Per-project parity ranking (FINAL, 22 folders)¶

Sorted by average parity. Spread (P90 − P10) shows project consistency.

Project	Panels	PASS	Avg	Median	P10	P90
ConstructiVision Sample Building	59	2	94.4%	96.1%	88.1%	98.7%
Segale/General Mills	1	0	90.8%	90.8%	—	—
TECT	78	0	89.2%	87.4%	83.7%	96.7%
Industrial Place/Lot 5	37	1	88.5%	88.9%	79.6%	97.0%
Portside Business Center/Building H	96	0	87.0%	90.8%	74.7%	96.5%
Sample TiltUp Site	59	0	85.6%	84.5%	76.2%	96.4%
Smartcap DC North/Test	2	0	83.2%	84.0%	—	—
Lowes FDC Centralia/Lowes FDC Centralia	78	9	80.8%	85.2%	62.5%	100.0%
Rivers Edge Project	43	2	79.7%	78.9%	67.6%	91.2%
Duck Delivery	41	2	79.5%	87.7%	57.7%	90.0%
Segale Properties/162	37	0	79.2%	83.6%	63.5%	96.3%
Sumner North	68	0	79.2%	74.8%	62.2%	95.0%
Lowes FDC Centralia	79	5	79.1%	78.9%	59.4%	98.0%
Everett Dat	47	0	71.4%	74.7%	56.6%	81.2%
Old Dominion Everett	47	0	63.5%	59.6%	45.6%	88.9%
Segale Properties/P152	96	2	61.0%	63.3%	29.8%	71.8%
Arlington Airport A	84	0	59.2%	57.6%	49.9%	73.0%
Smartcap DC North/Building B	52	0	59.0%	56.6%	49.3%	70.4%
Smartcap DC North/Building A	116	0	58.4%	59.8%	44.9%	71.3%
Arlington Airport Building A	107	12	58.2%	53.3%	44.1%	100.0%
Segale Properties/P161	61	0	56.1%	62.5%	27.9%	70.6%
Waterfall	87	0	42.7%	40.1%	35.0%	49.6%

Read: TECT (89.2% avg, 78/78 ≤50, P10=83.7%) is the strongest “single fix unlocks many” signal. Portside emerges as a strong secondary (87.0% avg, 96 panels, no <60%). Waterfall is uniformly bad — even the BEST 10% sit at 49.6% parity.

Per-feature flag prevalence + dialog meaning¶

The Panel Options dialog (mp_dlg.dcl) defines 14 active feature toggles plus 2 always-on (PP/BP) and several legacy/removed entries.

Flag	Feature name (from `mp_dlg.dcl`)	Panels	% of corpus
mpch	Chamfer	1,346	97.9%
mpfh	Feature Strip (H+V combined)	1,164	84.7%
mpsd	Slab Dowels	398	28.9%
mplb	Ledger / Top Plate	313	22.8%
mpwc	Weld Connections	154	11.2%
mpdr	Man Door	116	8.4%
mppl	Pilaster / Lintel (combined)	57	4.1%
mprb	Recess / Blockout	27	2.0%
mpm2	Mid-floor type 2 (Duck Delivery only)	1	0.1%
mpm1	Mid-floor type 1 (Duck Delivery only)	1	0.1%
mpdl	Dock Leveler — gate-suppressed (0 panels across 1,375)	0	0%

Features in the dialog but never observed in the corpus:

mpwd (Standard Opening / window) — 0 panels
mpro (Rough Opening) — 0 panels
mpsb (Square Blockout) — 0 panels
mppp / mpbp (Pick / Brace Points) — always-on, not surfaced as activation flags

Legacy/removed dialog entries (still in mpvar list for back-compat per convert.lsp):

mpfs (Footing Step), mpts (Top Step), mpss (Spandrel Seat) — removed in VLX
mpfv (Vertical Feature Strip) — combined into mpfh
mptp (Top Plate) — subsumed under mplb in dialog; still referenced by drawpan/centgrav for plate-thickness deduction (Bug 157 — missing from panatt_section_toggles)
mpll — purpose unclear, never observed active

Top-10 ugliest panels (FINAL)¶

Phase B v2 reshuffled the worst-panel ranking — Segale Properties dominates, all carrying mppl (Pilaster/Lintel), mprb (Recess/Blockout), or mplb (Ledger/Top Plate).

Panel	Project	Δ	Features
Segal162100	Segale Properties/162	−1,469	mpch\|mpfh\|mplb\|mppl
SegalP16047	Segale Properties/P161	−1,408	mpch\|mpfh\|mplb\|mppl
SegalP16018	Segale Properties/P161	−1,183	mpch\|mpfh\|mppl
SegalP15040	Segale Properties/P152	−1,133	mpch\|mpfh\|mppl
SegalP15071	Segale Properties/P152	−1,127	mpch\|mpfh\|mppl
SegalP15039	Segale Properties/P152	−1,117	mpch\|mpfh\|mppl
SegalP15072	Segale Properties/P152	−1,101	mpch\|mpfh\|mppl
SegalP16048	Segale Properties/P161	−1,003	mpch\|mpfh\|mppl
SegalP16019	Segale Properties/P161	−973	mpch\|mpfh\|mppl
SegalP16045	Segale Properties/P161	−830	mpch\|mpfh\|mppl

100% of top-10 ugliest are Segale; 90% carry mppl. Full list (top-20) in reports/batch-parity/ALL-PROJECTS-FINDINGS.md.

Phase B → Phase C re-entry plan (FINAL)¶

The deferred Phase C docket (Bug 154) gets re-prioritized against the 1,375-panel corpus rather than the CSB tail.

Bug 156 (panatt section-active universal “last element” rule) — corpus-wide root cause, lands first.
TECT (89.2% avg) — diagnose +27 over-emit on mpch|mpfh. ~50 panels of 78 likely flip to PASS.
Portside Business Center/Building H (87.0% avg) — same-shape mpch|mpfh|mpsd plus mplb. Strong secondary tuning target.
mplb (Ledger/Top Plate) partial implementation — 313 panels, 60% in Smartcap DC North (170) + Arlington (117). Fixing this unlocks the entire Smartcap project family which currently shows 0 PASS across 170 panels.
mppl (Pilaster/Lintel) partial implementation — 57 panels, 92% in Segale Properties. Δ −600 to −1,469 indicates a missing drawing subsystem.
Waterfall WC catalog — 52 mpwc panels with 42.7% project-avg parity. Tied to long-running catalog architecture work (Bug 154).
mpdl gate — pre-condition for any dock-leveler work; lift the panatt activation block (CLAUDE.md TODO Phase 7).
STS as a parallel CSB022 regression target — same full feature combo, consistent +80–100 over-emit.

The original Phase C plan (CSB008 anomaly, Bug 147 / 150 / 153 / 140) remains in Bug 154 as a parking docket.